Afsal C Majeed

Lead 27+ employees and consultants across Bangalore and Hyderabad, with end-to-end ownership of Synopsys developer tools in India; partner with global engineering leaders to define priorities, plan and execute strategic R&D initiatives.

• Repatriated 100% of HQ-diverted operations to India within 8 months with zero business disruption, overcoming critical attrition through rapid team restructuring and strengthened recruitment standards.
• Scaled developer tools from a single-product footprint to all anchor products and ultimately across Synopsys, supporting a 5× larger user base with the same number of developers through refactoring, standardization and platform generalization.
• Accelerated enterprise AI-copilot adoption across 5,000+ engineers by building and deploying a custom VSCode-based platform with coding-agent integration, standardizing development environments and streamlining internal software delivery.
• Increased Chime adoption by 600% to 7,000+ users by standardizing check-in management across Synopsys, retiring legacy tools, migrating to Git and deploying containerized infrastructure.
• Owned the full software development lifecycle for the developer-tools portfolio, spanning requirements, feature definition, development, testing, analysis, tracking, release and support; leveraged development-process data to identify bottlenecks and root causes of nightly failures, strengthening engineering quality.

Led Kalido's India Engineering operations, overseeing team building, product-development transition from the UK, engineering delivery, build/release activities and key Information Engine initiatives across DIW, MDM, BIM and UID.

• Spearheaded the 100% transition of active Kalido product development to India, rapidly building a high-caliber 11-member engineering team following technical immersion with the UK R&D team.
• Accelerated technology, product and domain knowledge transfer from the UK R&D organization, enabling the India team to support multiple product releases across DIW, MDM, BIM and UID.
• Expanded Information Engine compatibility to Teradata and Netezza, leading and contributing to three critical initiatives spanning database ports and Netezza query-performance architecture improvements across geographically distributed teams.
• Managed 11 engineers across line management, build and release activities while continuing as an individual contributor on key engineering initiatives and feature enhancements.

Built and led a 9-member Bangalore R&D team for Formality, Synopsys's formal verification and equivalence-checking platform, owning team building, retention, technical delivery, quality and coordination with global teams.

• Led development, troubleshooting and debugging of HDL analysis and compilation across VHDL, Verilog and SystemVerilog for formal verification of digital circuits; rapidly developed EDA expertise to provide hands-on technical guidance and resolve complex engineering issues.
• Delivered all first-year goals, earning a team award, and transitioned the India team to complete ownership of Formality's VHDL reader within the first year.
• Expanded India ownership across multiple critical Formality components, including DB, Milky Way and DDC readers, Activation Conditions, Function Inferred DesignWare and Library Verification; also successfully integrated 3 engineers relocated from another group.

• Progressed from Individual Contributor to Technical Manager, ultimately owning the Windows Apex Ada/C/C++ development environment from the India Development Center.
• Led development of optimizer, code generators and debugger components; designed the Remote Compiler Integrator (RCI) and build process, supporting 4 major product releases plus maintenance patches.
• Contributed to Apex Linux migration to Eclipse, Testmate quality initiatives, technical recruitment and IBM technical forums, including co-leading a conference on Static Analysis in Software Engineering.

• Developed systems software and high-performance graphics using C/C++, including a 3D graphics adapter simulator and OpenGL geometry microcode performance optimization.
• Led development of JPEG/MPEG browser components and JPEG export functionality for a VRML authoring environment across AIX and Windows 95.
• Contributed to CORBA/Java client-server architecture, graphics test automation and API test-suite development across IBM engineering engagements.